(1) The ERC reports have no access signal:

　　a. Define the I/O attributes for the pipeline when creating packaging;

　　b. Modify the inconsistent GRID attributes when creating an element or placing an element.

　　c. When creating components, the direction of PIN is reverse, and it must be unconnected in the PIN NAME end.

　　d. The more common reasons are that there are no engineering documents. This is a mistake that beginners make.

　　(2) Components run outside the drawing industry: No components are created in the component library diagram table paper center.

　　(3) The created engineering file network table can only be partially transferred to the PCB: when generating Netlist, no selection is Global.

　　(4) When using multiple parts created by yourself, do not use Annotate.