The main problem with RF circuit layout is usually the unsatisfactory characteristic impedance of the circuit, including circuit components and their interconnections. If the copper layer on the lead is relatively thin, it is equivalent to an inductance line and forms a distributed capacitance with other adjacent leads. When the lead passes through a through hole, it also exhibits inductance and capacitance characteristics.

　　The through-hole capacitance mainly comes from the capacitance formed between the copper coating on the through-hole pad side and the copper coating on the formation, which is separated by a relatively small circular ring. Another influence comes from the cylindrical structure of the metal through hole itself. The influence of parasitic capacitance is generally small and usually only causes the edge of high-speed digital signals to deteriorate.

　　The biggest impact of via is the parasitic inductance caused by the corresponding interconnection method. Because in RF PCB design, most metal vias have the same size as lumped components, a simple formula can be used to estimate the impact of circuit vias